This invention relates to a microprogrammed microprocessor, and more particularly to a microprocessor formed into a large scale integration (LSI) controlled in accordance with the microprogram.
A known microprogram control method is widely adopted as the computer control method. In the microprogrammed computer, the microinstruction which can replace an instruction of machine languages is executed in accordance with the microprogram provided correspondingly to each macroinstruction. The microprogram is sequentially arranged with a plurality of microinstructions. This is portion of microprogram is called a "microroutine". The microinstructions are each given a corresponding operation code and are discriminated from each other in accordance with the respective operation codes. Each time the computer executes the macroinstruction, determination is made of the starting address of a specified microroutine corresponding to the operation code of the macroinstruction, whereby the operation of branching the macroinstruction operation into the starting address is performed. Since, in this case, a decode table for the correspondence between the operation code and the starting address of the microroutine is necessary, a memory (DROM) for storing the decode table therein is provided. Further, a memory (ROM) is provided which stores therein the microroutines each allocated in the corresponding starting address read out from the decode table. Further, an arithemetic logic control section is provided which control, the operation between DROM and ROM and executes the microroutine. A detailed explanation of the microprogrammed processor having DROM and ROM is disclosed in U.S. Pat. No. 3,646,522. However, where such microprogrammed processor as mentioned above is formed into LSI, the arithmetic logic control section is usually formed into one package and is connected to DROM and to ROM through buses, respectively. In this case in particular, a pair of bus units each consisting of address bus and data bus are necessary between DROM and the arithmetic logic control section and between ROM and the latter, respectively. Accordingly, a large number of input/output pins utilizing for the buses are required for the LSI package of arithmetic logic control section. Provision of such large number of input/output pins on the LSI package not only causes an increase in the package cost and bonding cost, but also causes an enlargement in size of the package in the actual formation of the control section into LSI, resulting in that the package occupies a large area on the print circuit, thus to cause a decrease in the merit of forming control section into LSI.